Hardware in the Loop (HIL) allows one to emulate a system or part of it in real time, and it is, therefore, widely used for power electronics. Real-time simulations require high speed so FPGAs (Field Programmable Gate Array) in HIL are widely used. It is crucial to minimize the delay and area, without losing either resolution or accuracy. Therefore, the Word Length (WL) of signals in power converter models has a huge influence. There are complex WL determination procedures that require long-time simulations. This paper presents a simple and analytical WL selection method for the signals of HIL models of converters. Signal groups are distinguished, and the WL signal is selected depending on the group the signals belong to. The method is applied to a boost and a buck converter in fixed-point. Finally, several rules are given to calculate the optimized WL in the signals of a power converter.